M65665DSP Datasheet, PDF (1/18 Pages) Renesas Technology Corp – PICTURE-IN-PICTURE SIGNAL PROCESSING

M65665DSP
PICTURE-IN-PICTURE SIGNAL PROCESSING
REJ03F0012-0100Z
Rev.2.00
Sep.04.2003
Description
The M65665DSP is a PIP (Picture in Picture) signal processing LSI, whose sub-picture input is composite signal or
component signals(Y/C or Y/U/V) for NTSC , PAL-M , PAL-N. The built-in field memory (168k-bit RAM) , V-chip
data slicer and analog circuitries lead the high quality PIP system low cost and small size.
Features
• Internal V-chip data slicer (for sub-picture)
• Vertical filter for sub-picture (Y signal)
• Base band com filter (2 Line)
• Single sub-picture (selectable picture size : 1/9 , 1/16)
• Sub-picture processing specification (1/9 , 1/16 size) :
Quantization bits Y, B-Y, R-Y : 7 bits
Horizontal sampling 229 pixels (Y), 57 pixels (B-Y, R-Y)
Vertical lines 69/ 52 lines
• Frame (sub-picture) on/off
• Built-in analog circuits :
Two 8-bit A/D converters (for sub-picture signal)
Three 8-bit D/A converters (for Y, U and V of sub-picture)
Auto Slicer(Sync Sep.), Sync-tip-clamp, VCXO, OSD switch, etc..
• I²C BUS control (parallel/serial control) :
PIP on/off , Frame on/off (programmable luma level),
Sub-picture size (1/9, 1/16),
PIP position (free position), Picture freeze ,
Y delay adjustment, Chroma level, Tint, Black level, Contrast ...etc..
Application
NTSC , PAL-M , PAL-N color TV
Recommended Operating Conditions
Supply voltage range --------------------- 3.2 to 3.5 V
Recommended supply voltage --------------------- 3.3 V
Rev.2.00, Sep.04.2003, page 1 of 17