HN58X2432SI_05 Datasheet, PDF (8/22 Pages) Renesas Technology Corp – Two-wire serial interface 32k EEPROM (4-kword × 8-bit)/64k EEPROM (8-kword × 8-bit)

HN58X2432SI/HN58X2464SI
Device Address (A0, A1, A2)
Eight devices can be wired for one common data bus line as maximum. Device address pins are used to
distinguish each device and device address pins should be connected to V_CC or V_SS. When device address
code provided from SDA pin matches corresponding hard-wired device address pins A0 to A2, that one
device can be activated. These pins are internally pulled-down to V_SS. The device read these pins as Low
if unconnected.
Pin Connections for A0 to A2
Pin connection
Max connect
Memory size number
A2
A1
A0
32k bit
8
×*¹
×*¹
×*¹
64k bit
8
×*¹
×*¹
×*¹
Notes: 1. × = Don’t care (Open is also approval).
Notes
Write Protect (WP)
When the Write Protect pin (WP) is high, the write protection feature is enabled and operates as shown in
the following table. When the WP is low, write operation for all memory arrays are allowed. WP pin
should be fixed high or low status from start condition input to stop condition input. When left
unconnected, write operation for all memory arrays are allowed because the WP pin is internally pulled
down to V_SS. The read operation is always activated irrespective of the WP pin status.
Write Protect Area
WP pin status
V_IH
V_IL
Write protect area
All memory
Normal read/write operation
Rev.2.00, Jan.11.2005, page 8 of 20