HM64YLB36512_15 Datasheet, PDF (8/33 Pages) Renesas Technology Corp – 16M Synchronous Late Write Fast Static RAM (512-kword × 36-bit)

HM64YLB36512 Series
Truth Table
Late select mode
Late write mode
ZZ SS G SWE SWEa SWEb SWEc SWEd K
K
Operation
DQ (n) DQ (n+1)
H ×× ×
×
×
×
×
× × Sleep
High-Z High-Z
mode
L H× ×
×
×
×
×
L-H H-L Dead
×
(not
selected)
High-Z
L ×H H
×
×
×
×
× × Dead
High-Z ×
(dummy
read)
L LL H
×
×
×
×
L-H H-L Read
×
DOUT
(a, b, c,
d)
0 to 8
L L× L
L
L
L
L
L-H H-L Write
High-Z DIN
a, b, c, d
(a, b, c,
byte
d)
0 to 8
L L× L
H
L
L
L
L-H H-L Write
High-Z DIN
b, c, d
(b, c, d)
byte
0 to 8
L L× L
L
H
L
L
L-H H-L Write
High-Z DIN
a, c, d
(a, c, d)
byte
0 to 8
L L× L
L
L
H
L
L-H H-L Write
High-Z DIN
a, b, d
(a, b, d)
byte
0 to 8
L L× L
L
L
L
H L-H H-L Write
High-Z DIN
a, b, c
(a, b, c)
byte
0 to 8
L L× L
H
H
L
L
L-H H-L Write
High-Z DIN
c, d byte
(c, d)
0 to 8
L L× L
L
H
H
L
L-H H-L Write
High-Z DIN
a, d byte
(a, d)
0 to 8
L L× L
L
L
H
H L-H H-L Write
High-Z DIN
a, b byte
(a, b)
0 to 8
L L× L
H
L
L
H L-H H-L Write
High-Z DIN
b, c byte
(b, c)
0 to 8
L L× L
H
H
H
L
L-H H-L Write
High-Z DIN (d)
d byte
0 to 8
L L× L
H
H
L
H L-H H-L Write
High-Z DIN (c)
c byte
0 to 8
L L× L
H
L
H
H L-H H-L Write
High-Z DIN (b)
b byte
0 to 8
L L× L
L
H
H
H L-H H-L Write
High-Z DIN (a)
a byte
0 to 8
Notes: 1. H: VIH, L: VIL, ×: VIH or VIL
2. SWE, SS, SWEa to SWEd, SA and SAS are sampled at the rising edge of K clock.
Register-latch mode
DQ (n)
High-Z
DQ (n+1)
High-Z
High-Z ×
High-Z High-Z
DOUT
(a, b, c,
d)
0 to 8
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
×
DIN
(a, b, c,
d)
0 to 8
DIN
(b, c, d)
0 to 8
DIN
(a, c, d)
0 to 8
DIN
(a, b, d)
0 to 8
DIN
(a, b, c)
0 to 8
DIN
(c, d)
0 to 8
DIN
(a, d)
0 to 8
DIN
(a, b)
0 to 8
DIN
(b, c)
0 to 8
DIN (d)
0 to 8
DIN (c)
0 to 8
DIN (b)
0 to 8
DIN (a)
0 to 8
Rev.3.00 Jan 13, 2006 page 6 of 29