HD74HC192 Datasheet, PDF (8/14 Pages) Hitachi Semiconductor – Synchronous Up/Down Decade,4-bit Binary Counter(Dual Clock Line)

HD74HC192, HD74HC193
Test Circuit
VCC
Input
Pulse Generator
Zout = 50 Ω
VCC
Output
Load Borrow
Up
Down
Clear ^Carry
A
B
C
QA to QD
D
Output
Output
C_L = 50 pF
C_L = 50 pF
C_L = 50 pF
Note : 1. C_L includes probe and jig capacitance.
Waveforms
• Waveform – 1 (HD74HC192)
tr
tf
Count
50%
Up
tw (H)
(Measure at tn+1) tPLH
90%
QA
50%
10%
50% 50%
tw (L)
tPHL (Measure at tn+2)
90%
50%
10%
50%
tTLH
tTHL
tPHL (Measure at tn+4)
tPLH (Measure at tn+2)
90%
90%
QB
50%
50%
10%
10%
tTHL
tPHL (Measure at tn+8)
tTLH
tPLH (Measure at tn+4)
QC
QD
Carry
90%
50%
10%
90%
50%
10%
tTHL
tPHL (Measure at tn+10)
tTLH
tPLH (Measure at tn+8)
90%
50%
10%
50%
10%
90%
(Measure before tPHL
1 clock of tn+10)
tTHL
tPLH (Measure at tn+10)
90%
50%
10%
90%
50%
tTLH
tTHL
tTLH
Notes : 1. Input pulse : PRR ≤ 1 MHz, Zo = 50 Ω, t_r ≤ 6 ns, t_f ≤ 6 ns
2. tn is reference bit time when all outputs are low.
V_CC
0V
VOH
VOL
VOH
VOL
VOH
VOL
VOH
VOL
VOH
VOL
Rev.3.00, Jan 31, 2006 page 8 of 13