H8S-2144B Datasheet, PDF (73/546 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer

Section 2 CPU
Table 2.6 Shift Instructions
Instruction Size*
Function
SHAL
B/W/L
Rd (shift) → Rd
SHAR
Performs an arithmetic shift on data in a general register. 1-bit or 2 bit
shift is possible.
SHLL
B/W/L
Rd (shift) → Rd
SHLR
Performs a logical shift on data in a general register. 1-bit or 2 bit shift is
possible.
ROTL
B/W/L
Rd (rotate) → Rd
ROTR
Rotates data in a general register. 1-bit or 2 bit rotation is possible.
ROTXL
B/W/L
Rd (rotate) → Rd
ROTXR
Rotates data including the carry flag in a general register. 1-bit or 2 bit
rotation is possible.
Note: * Size refers to the operand size.
B: Byte
W: Word
L: Longword
Rev. 1.00 Jun.24, 2005 Page 41 of 510
REJ09B0241-0100