M5M5T5672TG Datasheet, PDF (7/24 Pages) Renesas Technology Corp – 18874368-BIT(262144-WORD BY 72-BIT) NETWORK SRAM

Renesas LSIs
M5M5T5672TG – 20
18874368-BIT(262144-WORD BY 72-BIT) NETWORK SRAM
WRITE TRUTH TABLE
W# BWa# BWb# BWc# BWd# BWe# BWf# BWg# BWh#
Function
H
X
X
X
X
X
X
X
X Read
L
L
H
H
H
H
H
H
H Write Byte “a”
L
H
L
H
H
H
H
H
H Write Byte “b”
L
H
H
L
H
H
H
H
H Write Byte “c”
L
H
H
H
L
H
H
H
H Write Byte “d”
L
H
H
H
H
L
H
H
H Write Byte “e”
L
H
H
H
H
H
L
H
H Write Byte “f”
L
H
H
H
H
H
H
L
H Write Byte “g”
L
H
H
H
H
H
H
H
L Write Byte “h”
L
L
L
L
L
L
L
L
L Write All Bytes
L
H
H
H
H
H
H
H
H Write Abort / NOP
Note14. “H” = input VIH; “L” = input VIL; “X” = input VIH or VIL.
Note15. All inputs must meet setup and hold times around the rising edge (LOW to HIGH) of CLK.
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Conditions
Ratings
VDD
Power Supply Voltage
-1.0*~3.6
VDDQ
VI
I/O Buffer Power Supply Voltage
Input Voltage
With respect to VSS
-1.0*~3.6
-1.0~VDDQ+1.0 **
VO
Output Voltage
-1.0~VDDQ+1.0 **
PD
Maximum Power Dissipation (VDD)
1050
TOPR
Operating Temperature
0~70
TSTG(bias) Storage Temperature(bias)
-10~85
TSTG
Storage Temperature
-55~125
Note16. * This is -1.0V when pulse width≤2ns, and -0.5V in case of DC.
** This is -1.0V~VDDQ+1.0V when pulse width≤2ns, and –0.5V~VDDQ+0.5V in case of DC.
Unit
V
V
V
V
mW
°C
°C
°C
7/24
Preliminary
M5M5T5672TG-20 REV.1.0