HD74LS193 Datasheet, PDF (7/12 Pages) Hitachi Semiconductor – Synchronous Up/Down 4-bit Binary Counters(dual clock lines)

HD74LS193
Waveforms 1
ƒ_max, t_PLH, t_PHL, (Count Up)
t_TLH
t_THL
Count
90% 90%
3V
Up
10% ^{1.3V 1.3V} 10%
1.3V
1.3V
0V
t_{w (H)}
t_{w (L)}
t_PHL
t_PLH
(Measure at
tn + 2)
V_OH
Q_A
(Measure at
tn + 1)
1.3V
t_PHL
t_PLH (Measure at tn + 2)
V_OL
(Measure at
tn + 4)
V_OH
Q_B
1.3V
1.3V
Outputs
Q_C
V_OL
t_PHL
t_PLH (Measure at tn + 4)
(Measure at
tn + 8)
V_OH
1.3V
1.3V
V_OL
t_PHL
t_PLH (Measure at tn + 8)
(Measure at
tn + 16)
V_OH
Q_D
1.3V
1.3V
V_OL
(Measure before ^tPHL
t_{PLH (Measure at tn + 16)}
1 clock of tn + 16)
Carry
V_OH
1.3V
1.3V
V_OL
Notes:
1. Input pulse; t_TLH, t_THL ≤ 7 ns, Duty Cycle ≤ 50%, PRR = 500 kHz (Data input). PRR = 1 MHz
(except data input)
2. for ƒ_max t_TLH = t_THL ≤ 2.5 ns.
3. t_n is reference bit time when all outputs are low.
Rev.2.00, Feb.18.2005, page 7 of 11