HD74LS193 Datasheet, PDF (6/12 Pages) Hitachi Semiconductor – Synchronous Up/Down 4-bit Binary Counters(dual clock lines)

HD74LS193
Testing Method
Test Circuit
4.5V
P.G.
Zout = 50Ω
Input
V_CC
Up
Down
A
B
C
D
Load
Clear
Output
Borrow
Load circuit 1
RL
CL
Output
Carry
Same as Load Circuit 1.
Output
QA
Same as Load Circuit 1.
Output
QB
Same as Load Circuit 1.
Output
QC
Same as Load Circuit 1.
Output
QD
Same as Load Circuit 1.
Notes: 1. C_L includes probe and jig capacitance.
2. All diodes are 1S2074(H).
Testing Table
Item From input to output
ƒ_max
t_PLH
t_PHL
Note:
Up Count
Down Count
Up Count
Down Count
Load→Q
Clear→Q
*. For initialized
Item From input to output
Up Count
ƒ_{max Down Count}
Up Count
t_PLH Down Count
t_PHL Load→Q
Clear→Q
CLR
GND
GND
GND
GND
GND
IN
Load
4.5V
4.5V
4.5V
4.5V
IN
IN*
Up
IN
4.5V
IN
4.5V
GND
GND
Inputs
Down
A
4.5V
GND
IN
GND
4.5V
GND
IN
GND
GND
IN
GND
4.5V
B
GND
GND
GND
GND
IN
4.5V
C
GND
GND
GND
GND
IN
4.5V
D
GND
GND
GND
GND
IN
4.5V
Q_A
OUT
OUT
OUT
OUT
OUT
OUT
Q_B
OUT
OUT
OUT
OUT
OUT
OUT
Outputs
Q_C
Q_D
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
Carry
OUT
—
OUT
—
—
—
Borrow
—
OUT
—
OUT
—
—
Rev.2.00, Feb.18.2005, page 6 of 11