BB501M Datasheet, PDF (7/11 Pages) Hitachi Semiconductor – Build in Biasing Circuit MOS FET IC UHF/VHF RF Amplifier

BB501M
Drain Current vs. Gate Resistance
20
15
10
5
V_DS = V_G1 = 5 V
V_G2S = 4 V
0
10
20
50
100
Gate Resistance R_G (kΩ)
Noise Figure vs.
Gate2 to Source Voltage
5
V_DS = 5 V
4
R_G = 47 kΩ
f = 900 MHz
3
2
1
1
2
3
4
Gate2 to Source Voltage V_G2S (V)
Gain Reduction vs.
Gate2 to Source Voltage
0
10
20
30
V_DS = V_G1 = 5 V
40
V_G2S = 4 V
R_G = 47 kΩ
50
4
3
2
1
0
Gate2 to Source Voltage V_G2S (V)
Rev.6.00 Aug 10, 2005 page 7 of 10
Power Gain vs.
Gate2 to Source Voltage
25
20
15
10
V_DS = 5 V
5
R_G = 47 kΩ
f = 900 MHz
0
1
2
3
4
Gate2 to Source Voltage V_G2S (V)
Input Capacitance vs.
Gate2 to Source Voltage
4
3
2
1 _{VDS = 5 V}
R_G = 47 kΩ
f = 1 MHz
0
0
1
2
3
4
Gate2 to Source Voltage V_G2S (V)