H83062 Datasheet, PDF (682/1021 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Section 19 H8/3062 Internal Voltage Step-Down Version ROM [H8/3062F-ZTAT B-Mask Version,
Masked ROM B-Mask Versions of H8/3062, H8/3061, and H8/3060]
Write pulse application subroutine
Sub-Routine Write Pulse
WDT enable
Set PSU in FLMCR1
Wait (tspsu) µs
Set P bit in FLMCR1
Wait (tsp) µs
Clear P bit in FLMCR1
Wait (tcp) µs
*7
Start of programming
*5 *7
Programming halted
*7
Start of programming
START
Set SWE bit in FLMCR1
Perform programming in the erased state.
Do not perform additional programming
on previously programmed addresses.
Wait (tsswe) µs
*7
Store 128-byte program data in program
*4
data area and reprogram data area
n= 1
m= 0
Write 128-byte data in RAM reprogram
data area consecutively to flash memory
*1
Sub-Routine-Call
Write pulse
See Note 6 for pulse width
Clear PSU bit in FLMCR1
Wait (tcpsu) µs
*7
Disable WDT
End Sub
Set PV bit in FLMCR1
Wait (tspv) µs
*7
H'FF dummy write to verify address
Wait (tspvr) µs
*7
Read verify data
*2
n←n+1
Note 6: Write Pulse Width
Number of Writes n Write Time (tsp) µs
1
30
2
30
3
30
4
30
5
30
6
30
7
200
8
200
9
200
10
200
11
200
12
200
13
200
Increment address
998
200
999
200
1000
200
Note: Use a 10 µs write pulse for additional programming.
Write data =
NG
verify data?
OK
NG
6≥n?
OK
Additional-programming data computation
m=1
Transfer additional-programming data to
additional-programming data area
*4
Reprogram data computation
*3
Transfer reprogram data to reprogram data area *4
128-byte
NG
data verification completed?
OK
Clear PV bit in FLMCR1
Wait (tcpv) µs
*7
RAM
Program data storage
area (128 bytes)
NG
6 ≥ n?
OK
Successively write 128-byte data from additional-
programming data area in RAM to flash memory ^*1
Sub-Routine-Call
Write Pulse (Additional programming)
Reprogram
Reprogram data storage
area (128 bytes)
Additional-programming
data storage area
(128 bytes)
NG
m= 0 ?
OK
Clear SWE bit in FLMCR1
Wait (tcswe) µs
*7 _NG
n ≥ N?
OK
Clear SWE bit in FLMCR1
Wait (tcswe) µs
*7
End of programming
Programming failure
Notes: 1. Data transfer is performed by byte transfer. The lower 8 bits of the first address written to must be H'00 or H'80.
A 128-byte data transfer must be performed even if writing fewer than 128 bytes; in this case, H'FF data must be written to the extra addresses.
2. Verify data is read in 16-bit (longword) units.
3. Reprogram data is determined by the operation shown in the table below (comparison between the data stored in the program data area and the verify data). Bits for which the reprogram data is 0 are
programmed in the next reprogramming loop. Therefore, even bits for which programming has been completed will be subjected to programming once again if the result of the subsequent verify operation is NG.
4. A 128-byte area for storing program data, a 128-byte area for storing reprogram data, and a 128-byte area for storing additional data must be provided in RAM.
The contents of the reprogram data area and additional data area are modified as programming proceeds.
5. A write pulse of 30 µs or 200 µs is applied according to the progress of the programming operation. See Note 6 for details of the pulse widths. When writing of additional-programming data is executed, a 10 µs
write pulse should be applied. Reprogram data X' means reprogram data when the write pulse is applied.
7. The wait times and value of N are shown in section 22.5.6, Flash Memory.
Reprogram Data Computation Table
Additional-Programming Data Computation Table
Original Data
(D)
0
0
1
1
Verify Data
(V)
0
1
0
1
Reprogram Data
(X)
1
0
1
1
Comments
Programming completed
Programming incomplete; reprogram
Still in erased state; no action
Reprogram Data
(X')
0
0
1
1
Verify Data
(V)
0
1
0
1
Additional-
Programming Data (Y)
0
1
1
1
Comments
Additional programming to be executed
Additional programming not to be executed
Additional programming not to be executed
Additional programming not to be executed
Figure 19.11 Program/Program-Verify Flowchart (128-Byte Programming)
Rev. 6.00 Mar 18, 2005 page 634 of 970
REJ09B0215-0600