TMS320C6745 Datasheet, PDF (67/209 Pages) Texas Instruments – Floating-point Digital Signal Processor

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TMS320C6745/6747 Floating-point Digital Signal Processor
SPRS377A – SEPTEMBER 2008 – REVISED OCTOBER 2008
4.4.5 CFGCHIP4
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Reserved
R-n/a
15
14
13
12
11
10
9
8
7
6
5
4
Reserved
Reserved
R/W-1
LEGEND: R = Read, W = Write, n = value at reset
R/W-0
Figure 4-28. CFGCHIP4 Register Bit Layout
3
2
1
0
AMUT AMUT AMUT
ECLR ECLR ECLR
2
1
0
R/W-0 R/W-0 R/W-0
Bit
31:16
15:8
7:3
2
1
0
Field
Reserved
Reserved
Reserved
AMUTECLR2
AMUTECLR1
AMUTECLR0
Table 4-29. CFGCHIP4 Field Description
Description
Reserved
Reserved
Reserved
Write 1 causes a single pulse that clears the 'latched' GPIO interrupt for AMUTEIN of McASP2
when '1'. Always reads back '0'.
Write 1 causes a single pulse that clears the 'latched' GPIO interrupt for AMUTEIN of McASP1
when '1'. Always reads back '0'.
Write 1 causes a single pulse that clears the 'latched' GPIO interrupt for AMUTEIN of McASP1
when '1'. Always reads back '0'.
4.4.6 SUSPSRC
31
30
29
Reserved
28
27
26
25
24
23
TIMER TIMER GPIOS ePWM ePWM ePWM
64P1 64P0 RC 2SRC 1SRC 0SRC
R/W-1
22
SPI1
SRC
21
SPI0
SRC
20
19
18
UART UART UART
2SRC 1 SRC 0SRC
17
I2C1
SRC
16
I2C0
SRC
15
MMC /
SD /
SRC
14
13
Reserved
12
HPI
SRC
11
RSV
10
USB1
SRC
9
USB0
SRC
LEGEND: R = Read, W = Write, n = value at reset
8
7
Reserved
R/W-1
6
RSV
5
4
3
2
1
0
EMAC eQEP eQEP eCAP2 eCAP1 eCAP0
SRC 1 SRC 0 SRC SRC SRC SRC
Figure 4-29. SUSPSRC Register Bit Layout
Bit Field
31: RSV
29
28 TIMER64P1
27 TIMER64P0
26 GPIOSRC
Description
Reserved
Table 4-30. SUSPSRC Field Descriptions
TIMER64P1 Suspend Source
0 = NO emulation suspend, 1 = DSP emulation suspend
TIMER64P0 Suspend Source
0 = NO emulation suspend, 1 = DSP emulation suspend
GPIO Module Suspend Source
0 = NO emulation suspend, 1 = DSP emulation suspend
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Device Configuration
67