H8S2218 Datasheet, PDF (657/750 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

Section 20 Power-Down Modes
Reset execution state
Manual
reset state
MRES pin = High
Program execution state
Power-on
reset state
RES pin = High
STBY pin = High
RES pin = Low
SLEEP instruction
Program-halted state
STBY pin = Low
Hardware
standby mode
SSBY = 0, LSON = 0
Sleep mode
(main clock)
High-speed mode
(main clock)
Any interrupt
SCK2 to
SCK0 = 0
SCK2 to
SCK0 ≠ 0
Medium-speed
mode
(main clock)
SLEEP instruction
Interrupt *¹
SLEEP instruction
SLEEP Instruction
SLEEP Instruction
SSBY = 1, PSS = 1,
SSBY = 1, PSS = 1,
DTON = 1, LSON = 0
DTON = 1, LSON = 1
After the oscillation
Clock switching
settling time (STS2 to 0),
exception processing
clock switching exception
processing
Sub-active
mode
(sub clock)
Interrupt *¹,
LSON bit = 0
SLEEP instruction
Interrupt *¹,
LSON bit = 1
SLEEP instruction
Interrupt *²
SSBY = 1,
PSS = 0, LSON = 0
Software
standby mode
SSBY = 1,
PSS = 1, DTON = 0
Watch mode
(subclock)
SSBY = 0,
PSS = 1, LSON = 1
Sub-speed mode
(subclock)
: Transition after exception processing
: Power-down
Notes:
When a transition is made between modes by means of an interrupt, the transition cannot be
made on interrupt source generation alone. Ensure that interrupt handling is performed after
accepting the interrupt request.
From any state except hardware standby mode, a transition to the power-on reset state occurs
when RES is driven low. From any state except hardware standby mode and power-on reset, a
transition to the manual reset state occurs when MRES is driven low.
From any state, a transition to hardware standby mode occurs when STBY is driven low.
Always select high-speed mode before making a transition to watch mode or subactive mode.
1. NMI and IRQ0 to IRQ4, IRQ7, RTC interrupt, and USB suspend/resume interrupt
2. NMI and IRQ0 to IRQ4, IRQ7, RTC interrupt, and WDT interrupt
Figure 20.1 Mode Transition Diagram
Rev.6.00 Jun. 03, 2008 Page 609 of 698
REJ09B0074-0600