H8S2218 Datasheet, PDF (525/750 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

Section 14 Universal Serial Bus (USB)
14.3.7 USB Endpoint Stall Register 1 (UESTL1)
UESTL1 is used to control stall cancellation mode for all endpoints.
Bit Bit Name Initial Value R/W
7 SCME
0
R/W
6 to —
0
All 0
R
Description
Reserved
The write value should always be 0.
Reserved
These bits are always read as 0 and cannot be
modified.
14.3.8 USB Endpoint Data Register 0s (UEDR0s)
UEDR0s stores the setup command for endpoint 0 (for Control_out transfer). UEDR0s stores 8-
byte command data sent from the host in setup stage.
For details on the USB operation when data for the next setup stage is received while data in
UEDR0s is being read, refer to section 14.8, Usage Notes.
UEDR0s is a byte register to which 4-byte address area is assigned. Accordingly, UEDR0s allows
the user to read 2-byte or 4-byte data continuously by word transfer or longword transfer.
Bit Bit Name Initial Value R/W
7 to 0 D7 to D0 —
R
Description
These bits store the setup command for Control_out
transfer
14.3.9 USB Endpoint Data Register 0i (UEDR0i)
UEDR0i is a data register for endpoint 0 (for Control_in transfer). UEDR0i stores data to be sent
to the host. The number of data items to be written continuously must be the maximum packet size
or less.
UEDR0i is a byte register to which 4-byte address area is assigned. Accordingly, UEDR0i allows
the user to write 2-byte or 4-byte data continuously by word transfer or longword transfer. For
details, see section 2.9.4, Accessing Registers Containing Write-Only Bits.
Bit Bit Name Initial Value R/W
7 to 0 D7 to D0 All 0
W
Description
These bits store data for Control_in transfer
Rev.6.00 Jun. 03, 2008 Page 477 of 698
REJ09B0074-0600