H8S-2128 Datasheet, PDF (636/843 Pages) Renesas Technology Corp – Single-Chip Microcomputer

Item
Test
Symbol Min
Typ
Max Unit Condition
Erase
Wait time after x
SWE-bit setting*¹
10
—
—
µs
Wait time after y
ESU-bit setting*¹
200
—
—
µs
Wait time after z
E-bit setting*^1,*⁶
5
—
10
ms
Wait time after α
E-bit clear*¹
10
—
—
µs
Wait time after β
ESU-bit clear*¹
10
—
—
µs
Wait time after γ
EV-bit setting*¹
20
—
—
µs
Wait time after ε
dummy write*¹
2
—
—
µs
Wait time after η
EV-bit clear*¹
5
—
—
µs
Maximum erase N
count*^1,*^6,*⁷
—
—
120
Times z = 10 ms
Notes: 1. Set the times according to the program/erase algorithms.
2. Programming time per 32 bytes (Shows the total period for which the P-bit in the flash
memory control register (FLMCR1) is set. It does not include the programming
verification time.)
3. Block erase time (Shows the total period for which the E-bit in FLMCR1 is set. It does
not include the erase verification time.)
4. Maximum programming time (tP (max) = wait time after P-bit setting (z) × maximum
programming count (N))
5. Number of times when the wait time after P-bit setting (z) = 200 µs.
The number of writes should be set according to the actual set value of z to allow
programming within the maximum programming time (tP).
6. Maximum erase time (tE (max) = Wait time after E-bit setting (z) × maximum erase
count (N))
7. Number of times when the wait time after E-bit setting (z) = 10 ms.
The number of erases should be set according to the actual set value of z to allow
erasing within the maximum erase time (tE).
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