HD74LV2GT125A Datasheet, PDF (6/9 Pages) Renesas Technology Corp – Dual Bus Buffer with 3-state Output / CMOS Logic Level Shifter

HD74LV2GT125A
Test Circuit
V_CC
Input
Pulse Generator
Z OUT = 50 Ω
V_CC
Output
1k Ω _S1
C_L =
15 or 50 pF
OPEN
*1 See under table
GND
TEST
t_PLH / t _PHL
t_ZH/ t _HZ
t_ZL / t _LZ
S1
OPEN
GND
V_CC
Note: 1. C_L includes probe and jig capacitance.
Rev.2.00, Oct.23.2003, page 6 of 8