HD74LS163A Datasheet, PDF (6/12 Pages) Hitachi Semiconductor – Synchronous 4-bit Binary Counters(synchronous clear)

HD74LS163A
Testing Table
Item
From input to
output
ƒ_max
CK Ripply
→ Carry
CK → Q
t_PLH
t_PHL
CK → Q
Enable
T
→
Ripple
Carry
CLR → Q
Notes: *. For initialized
Clear Load
4.5V 4.5V
4.5V 4.5V
4.5V
4.5V
4.5V
GND
4.5V GND
IN GND
Enable
P
T
4.5V 4.5V
4.5V 4.5V
4.5V
GND
4.5V
GND
4.5V
IN
GND GND
Inputs
Clock
IN
A
GND
IN
GND
IN
GND
IN
IN*
IN*
4.5V
IN*
4.5V
Item From input to output
ƒ_max
CK→Ripple Carry
CK→Q
t_{PLH CK→Q}
t_{PHL Enable T→Ripple Carry}
CLR→Q
Q_A
OUT
—
OUT
OUT
—
OUT
Q_B
OUT
—
OUT
OUT
—
OUT
Outputs
Q_C
OUT
—
OUT
OUT
—
OUT
Data
B
C
GND GND
GND GND
GND
IN*
GND
IN*
4.5V
4.5V
4.5V
4.5V
D
GND
GND
GND
IN*
4.5V
4.5V
Q_D
OUT
—
OUT
OUT
—
OUT
Ripple Carry
OUT
OUT
—
—
OUT
—
Rev.2.00, Feb.18.2005, page 6 of 11