HD74LS160A Datasheet, PDF (6/11 Pages) Hitachi Semiconductor – Synchronous Decade Counters(direct clear)

HD74LS160A
Testing Table
Inputs
Item
From input to
output
Clear Load
Enable
Clock
Data
P
T
A
B
C
D
ƒ_max
4.5V 4.5V 4.5V 4.5V
IN
GND GND GND GND
CK Ripply
→ Carry
4.5V 4.5V 4.5V 4.5V
IN
GND GND GND GND
CK → Q
4.5V 4.5V 4.5V 4.5V
IN
t_PLH
t_PHL
CK → Q
Enable
T
→
Ripple
Carry
4.5V
4.5V
GND
GND
GND
4.5V
GND
IN
IN
IN**
GND
IN*
4.5V
GND
IN*
GND
GND
IN*
GND
GND
IN*
4.5V
CLR → Q
IN GND GND GND IN**
4.5V
4.5V
4.5V
4.5V
Notes: * Measuring outputs correspond to this condition, each outputs (Q_A, Q_B, Q_C, and Q_D) must not be over the
following rate, “H”, “L”, “L”, and “H”.
** For initialized
Item From input to output
ƒ_max
CK→Ripple Carry
CK→Q
t_{PLH CK→Q}
t_{PHL Enable T→Ripple Carry}
CLR→Q
Q_A
OUT
—
OUT
OUT
—
OUT
Q_B
OUT
—
OUT
OUT
—
OUT
Outputs
Q_C
OUT
—
OUT
OUT
—
OUT
Q_D
OUT
—
OUT
OUT
—
OUT
Ripple Carry
OUT
OUT
—
—
OUT
—
Rev.3.00, Jul.15.2005, page 6 of 10