HD74HC589 Datasheet, PDF (6/9 Pages) Hitachi Semiconductor – 8-bit Serial of Parallel-input/Serial-output Shift Register(with 3-state outputs)

HD74HC589
Test Circuit
VCC
Input
Pulse Generator
Zout = 50 Ω
Input
Pulse Generator
Zout = 50 Ω
VCC
OE
Output
SA
QH
Shift/Load
SCK
LCK
A to H
1 k Ω _S1
C_L =
50 pF
OPEN
GND
V_CC
TEST
t_PLH / t _PHL
t_ZH/ t _HZ
t_ZL / t _LZ
S1
OPEN
GND
V_CC
Note : 1. C_L includes probe and jig capacitance.
Waveforms
1. (SERIAL SHIFT / PARALLEL LOAD = "L")
Latch
Clock
Q_H
tr
tf
50% 50%
t_W(H)
tPLH
50%
10%
90%
tTLH
50%
t_W(L)
tPHL
90% _50%
10%
tTHL
VCC
0V
VOH
VOL
3.
Input G
tf
90%
50%
10%
tZL
tr
10%
90%
50%
tLZ
Waveform - A
Waveform - B
50%
tZH
50%
10%
tHZ
90%
VCC
0V
VOH
V_OL
VOH
VOL
2. (SERIAL SHIFT / PARALLEL LOAD = "H")
Shift
Clock
Q_H
50%
t_w
tPLH
50%
50%
50%
tPHL
50%
VCC
0V
VOH
VOL
4.
Serial Shift /
Parallel Load
tw
50%
t_PLH
50%
50%
tPHL
Data
50%
50%
VCC
0V
VCC
0V
Notes : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, t_r ≤ 6 ns, t_f ≤ 6 ns
2. Waveform - A is for an output with internal conditions such that the
output is low except when disabled by the output control.
3. Waveform - B is for an output with internal conditions such that the
output is high except when disabled by the output control.
4. The output are measured one at a time with one transition per measurement.
Rev.2.00 Mar 30, 2006 page 6 of 8