HD74HC589 Datasheet, PDF (1/9 Pages) Hitachi Semiconductor – 8-bit Serial of Parallel-input/Serial-output Shift Register(with 3-state outputs)

HD74HC589
8-bit Serial or Parallel-input/Serial-output Shift Register
(with 3-state outputs)
REJ03D0631-0200
(Previous ADE-205-511)
Rev.2.00
Mar 30, 2006
Description
The HD74HC589 is similar in function to the HD74HC597, which is not a 3-state device.
This device consists of an 8-bit storage latch which feeds parallel data to an 8-bit shift register. Data can also be loaded
serially (see Function Table). The shift register output, O_H, is a three-state output, allowing this device to be used in
bus-oriented systems.
Features
• High Speed Operation: t_pd (Shift Clock to Q_H) = 15 ns typ (C_L = 50 pF)
• High Output Current: Fanout of 15 LSTTL Loads
• Wide Operating Voltage: V_CC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: I_CC (static) = 4 µA max (Ta = 25°C)
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74HC589FPEL SOP-16 pin (JEITA)
PRSP0016DH-B
(FP-16DAV)
FP
PRSP0016DG-A
HD74HC589RPEL SOP-16 pin (JEDEC)
RP
(FP-16DNV)
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
Function Table
Latch Clock
LCK
X
Shift Clock
SCK
X
X
X
Serial Shift/
Parallel Load
X
L
L
L, H,
L, H,
X
X
H
Note: 1. H; High level, L; Low level, X; Irrelevant
Output Enable
OE
Function
X
Data are loaded into input latches
L
Data are loaded from input into shift registers
L
Data are transferred from input latches to shift
registers
H
Outputs are disabled
L
Serial shift Qn = Qn – 1, Q0 = SER
Rev.2.00 Mar 30, 2006 page 1 of 8