HD74HC125_15 Datasheet, PDF (6/11 Pages) Renesas Technology Corp – Quad. Bus Buffer Gates (with 3-state outputs)

HD74HC125, HD74HC126
Switching Characteristics (C_L = 50 pF, Input t_r = t_f = 6 ns)
Item
Propagation delay
time
Output enable
Time
Output disable
Time
Output rise/fall
time
Input capacitance
Symbol V_CC (V)
2.0
t_PLH, t_PHL 4.5
6.0
2.0
t_ZH, t_ZL
4.5
6.0
2.0
t_HZ, t_LZ
4.5
6.0
2.0
t_TLH, t_THL 4.5
6.0
Cin
—
Ta = 25°C
Ta = –40 to +85°C _Unit
Min Typ Max Min Max
— — 100 —
125
— 8 20
—
25 ns
— — 17
—
21
— — 150 —
190
— 9 30
—
38 ns
— — 26
—
33
— — 150 —
190
— 14 30
—
38 ns
— — 26
—
33
— — 60
—
75
— 4 12
—
15 ns
— — 10
—
13
— 5 10
—
10 pF
Test Circuit
V_CC
V_CC
Test Conditions
Input
Pulse generator
Z OUT = 50 Ω
C
Output
A
Y
1 k Ω _S1
C_L = 50 pF
OPEN
*1 See under table
GND
Note: C_L includes the probe and jig capacitance.
TEST
t_PLH /t_PHL
t _ZH/t_HZ
t_ZL /t_LZ
S1
OPEN
GND
V_CC
REJ03D0565-0300 Rev.3.00 Mar 25, 2009
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