HAT1024R_15 Datasheet, PDF (6/10 Pages) Renesas Technology Corp – Silicon P Channel Power MOS FET High Speed Power Switching

HAT1024R
Static Drain to Source on State Resistance
vs. Temperature
0.5
Pulse Test
0.4
0.3
V_GS = –4 V
0.2
I_D = –2 A
–1 A, –0.5 A
0.1
–2 A, –1 A, –0.5 A
–10 V
0
–40 0
40 80 120 160
Case Temperature Tc (°C)
Body-Drain Diode Reverse
Recovery Time
500
200
100
50
20
10
5
–0.1 –0.2
di / dt = 20 A / µs
V_GS = 0, Ta = 25°C
–0.5 –1 –2 –5 –10
Reverse Drain Current I_DR (A)
Dynamic Input Characteristics
0
0
V_DD = –5 V
–10 V
–10
–25 V
–4
–20
V_GS
–30 ^VDS
V_DD = –25 V
–40
–10 V
–5 V
I_D = –3.5 A
–50
0
4
8
12 16
Gate Charge Qg (nc)
–8
–12
–16
–20
20
Forward Transfer Admittance vs.
Drain Current
10
Tc = –25°C
5
25°C
2
75°C
1
0.5
0.2
0.1
–0.2 –0.5 –1 –2
V_DS = –10 V
Pulse Test
–5 –10 –20
Drain Current I_D (A)
10000
Typical Capacitance vs.
Drain to Source Voltage
3000
1000
300
100
Ciss
Coss
Crss
30
V_GS = 0
f = 1 MHz
10
0 –10 –20 –30 –40 –50
Drain to Source Voltage V_DS (V)
Reverse Drain Current vs.
Source to Drain Voltage
–20
–16
V_GS = –5 V
–12
–8
0, 5 V
–4
Pulse Test
0
0 –0.4 –0.8 –1.2 –1.6 –2.0
Source to Drain Voltage V_SD (V)
Rev.9.00 Sep 07, 2005 page 4 of 7