BB504C Datasheet, PDF (6/10 Pages) Hitachi Semiconductor – Build in Biasing Circuit MOS FET IC VHF&UHF RF Amplifier

BB504C
Power Gain vs. Gate Resistance
40
35
30
25
20
V_DS = 5 V
15 ^{VG1 = 5 V}
V_G2S = 4 V
10 ^{f = 900 MHz}
10 20 50
100 200
500 1000
Gate Resistance R_G (kΩ)
Drain Current vs. Gate Resistance
30
20
10
V_DS = V_G1 = 5 V
V_G2S = 4 V
0
10 20
50 100 200 500 1000
Gate Resistance R_G (kΩ)
Gain Reduction vs.
Gate2 to Source Voltage
0
10
20
30
V_DS = V_G1 = 5 V
40 ^RG ^{= 120 kΩ}
f = 200MHz
50
4
3
2
1
0
Gate2 to Source Voltage V_G2S (V)
Noise Figure vs. Gate Resistance
4
V_DS = 5V
V_G1 = 5 V
3
V_G2S = 4 V
f = 900 MHz
2
1
0
10 20
50 100 200 500 1000
Gate Resistance R_G (kΩ)
Input Capacitance vs.
Gate2 to Source Voltage
4
3
2
1
V_DS = VG1 = 5 V
R_G = 120 kΩ
0 ^{f = 1 MHz}
0
1
2
3
4
Gate2 to Source Voltage V_G2S (V)
Gain Reduction vs.
Gate2 to Source Voltage
0
10
20
30
40 ^{VDS = VG1 = 5 V}
R_G = 120 kΩ
f = 900MHz
50
4
3
2
1
0
Gate2 to Source Voltage V_G2S (V)
Rev.6.00 Aug 10, 2005 page 6 of 9