H838024 Datasheet, PDF (577/697 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer Super Low Power Series

Appendix A CPU Instruction Set
Appendix A CPU Instruction Set
A.1 Instructions
Operation Notation
Rd8/16
Rs8/16
Rn8/16
CCR
N
Z
V
C
PC
SP
#xx: 3/8/16
d: 8/16
@aa: 8/16
+
–
×
÷
∧
∨
⊕
→
—
General register (destination) (8 or 16 bits)
General register (source) (8 or 16 bits)
General register (8 or 16 bits)
Condition code register
N (negative) flag in CCR
Z (zero) flag in CCR
V (overflow) flag in CCR
C (carry) flag in CCR
Program counter
Stack pointer
Immediate data (3, 8, or 16 bits)
Displacement (8 or 16 bits)
Absolute address (8 or 16 bits)
Addition
Subtraction
Multiplication
Division
Logical AND
Logical OR
Exclusive logical OR
Move
Logical complement
Condition Code Notation
Symbol
*
0
—
Modified according to the instruction result
Not fixed (value not guaranteed)
Always cleared to 0
Not affected by the instruction execution result
Rev. 7.00 Mar 10, 2005 page 535 of 652
REJ09B0042-0700