R8C2A Datasheet, PDF (55/609 Pages) Renesas Technology Corp – MCU

R8C/2A Group, R8C/2B Group
5. Resets
Table 5.2 shows the Pin Functions while RESET Pin Level is “L”, Figure 5.2 shows the CPU Register Status after
Reset, Figure 5.3 shows the Reset Sequence, and Figure 5.4 shows the OFS Register.
Table 5.2 Pin Functions while RESET Pin Level is “L”
Pin Name
P0 to P3
P4_3 to P4_7
P5_0 to P5_4
P6
P8_0 to P8_6
Pin Functions
Input port
Input port
Input port
Input port
Input port
b15
b0
0000h
0000h
0000h
0000h
0000h
0000h
0000h
b19
b0
00000h
Content of addresses 0FFFEh to 0FFFCh
Data register(R0)
Data register(R1)
Data register(R2)
Data register(R3)
Address register(A0)
Address register(A1)
Frame base register(FB)
Interrupt table register(INTB)
Program counter(PC)
b15
b0
0000h
User stack pointer(USP)
0000h
Interrupt stack pointer(ISP)
0000h
Static base register(SB)
b15
b0
0000h
Flag register(FLG)
b15
b8 b7
b0
IPL
U I OB SZ DC
Figure 5.2 CPU Register Status after Reset
Rev.2.00 Nov 26, 2007 Page 35 of 580
REJ09B0324-0200