R8C2A Datasheet, PDF (124/609 Pages) Renesas Technology Corp – MCU

R8C/2A Group, R8C/2B Group
10. Clock Generation Circuit
10.2 On-Chip Oscillator Clocks
These clocks are supplied by the on-chip oscillators (high-speed on-chip oscillator and a low-speed on-chip
oscillator). The on-chip oscillator clock is selected by the FRA01 bit in the FRA0 register.
10.2.1 Low-Speed On-Chip Oscillator Clock
The clock generated by the low-speed on-chip oscillator is used as the clock source for the CPU clock,
peripheral function clock, fOCO, and fOCO-S.
After reset, the on-chip oscillator clock generated by the low-speed on-chip oscillator divided by 8 is selected as
the CPU clock.
If the XIN clock stops oscillating when bits OCD1 to OCD0 in the OCD register are set to 11b, the low-speed
on-chip oscillator automatically starts operating, supplying the necessary clock for the MCU.
The frequency of the low-speed on-chip oscillator varies depending on the supply voltage and the operating
ambient temperature. Application products must be designed with sufficient margin to allow for frequency
changes.
10.2.2 High-Speed On-Chip Oscillator Clock
The clock generated by the high-speed on-chip oscillator is used as the clock source for the CPU clock,
peripheral function clock, fOCO, fOCO-F, and fOCO40M.
To use the high-speed on-chip oscillator clock as the clock source for the CPU clock, peripheral clock, fOCO,
and fOCO-F, set bits FRA20 to FRA22 in the FRA2 register as follows:
• All divide ratio mode settings are supported when VCC = 3.0 V to 5.5 V 000b to 111b
• Divide ratio of 4 or more when VCC = 2.7 V to 5.5 V
010b to 111b (divide by 4 or more)
• Divide ratio of 8 or more when VCC = 2.2 V to 5.5 V
110b to 111b (divide by 8 or more)
After reset, the on-chip oscillator clock generated by the high-speed on-chip oscillator stops. Oscillation is
started by setting the FRA00 bit in the FRA0 register to 1 (high-speed on-chip oscillator on). The frequency can
be adjusted by registers FRA1 and FRA2.
Furthermore, frequency correction data corresponding to the supply voltage ranges VCC = 2.2 V to 5.5 V is
stored in FRA6 register. To use separate correction values to match this voltage ranges, transfer them from the
FRA6 register to the FRA1 register.
The frequency correction data of 36.864 MHz is stored in the FRA7 register. To set the frequency of the high-
speed on-chip oscillator to 36.864 MHz, transfer the correction value in the FRA7 register to the FRA1 register
before use.
Since there are differences in the amount of frequency adjustment among the bits in the FRA1 register, make
adjustments by changing the settings of individual bits. Adjust the FRA1 register so that the frequency of the
high-speed on-chip oscillator clock will be 40 MHz or less.
Rev.2.00 Nov 26, 2007 Page 104 of 580
REJ09B0324-0200