M66290AGP Datasheet, PDF (52/54 Pages) Mitsubishi Electric Semiconductor – USB DEVICE CONTROLLER

MITSUBISHI <DIGITAL ASSP>
M66290AGP/FP
USB DEVICE CONTROLLER
Abstraction of JTAG
M66290A has JTAG (Joint Test Action Group) interf ace
which meets IEEE 1149.1 test access port spec.
This JTAG interf ace can be used f or input/output path
(boundary scan path) f or boundary scan test.
Further inf ormation as to JTAG test access port, ref er
to "IEEE Std. 1149.1a-1993".
Pin descriptions
Pin description which relates to JTAG interf ace of
M66290A are as f ollows.
Test clock input (TCK)
Clock input into test circuit.
Test data input (TDI)
Sy nchronous serial input to input test command
code and test data. Data is sampled by the
positiv e edge of TCK.
Test data output (TDO)
Sy nchronous serial output to output test command
code and test data. Output data changes by the
negativ e edge of TCK and is output only in the state
of Shif t-IR or Shif t-DR. In other state,keeps "Z".
Test mode input (TMS)
Test mode select input to control status shif t of test
circuit. This is sampled by the positiv e edge of TCK.
Test reset input (TRST)
"L" activ e test reset input to initialize the test circuit
asy nchronously . To assure this reset f unction, keep
TMS input as "H" when this signal changes f rom "L"
to "H".
JTAG circuit constitution
JTAG circuit of M66290A is constituted by the blocks
as f ollows.
(1) Command register which keeps command code
which is f etched through the boundary scan path.
(2) Data register group which is accessed through the
boundary scan pass.
(3) Test access port (TAP) controller to control the
status shif t of JTAG block.
(4) Control logic f or input select, output select, and so.
TDI 11
TMS 10
TCK ₉
TRST ⁸
Data register group
Boundary scan
register (JTAGBSR)
By pass register
(JTAGBPR)
ID code register
(JTAGIDR)
Decoder
Command register
(3bits) (JTAGIR)
TAP controller
M66290A
12 TDO
51