HD64F3644HV Datasheet, PDF (508/551 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Series

Appendix B Internal I/O Registers
IENR1—Interrupt enable register 1
Bit
7
6
5
IENTB1 IENTA —
Initial value
0
0
0
Read/Write
R/W
R/W
—
H'FFF4
System control
4
3
2
1
0
—
IEN3 IEN2 IEN1 IEN0
1
0
0
0
0
—
R/W R/W R/W R/W
IRQ₃ to IRQ₀ interrupt enable
0 Disables IRQ3 to IRQ₀ interrupt requests
1 Enables IRQ3 to IRQ₀ interrupt requests
Timer A interrupt enable
0 Disables timer A interrupt requests
1 Enables timer A interrupt requests
Timer B1 interrupt enable
0 Disables timer B1 interrupt requests
1 Enables timer B1 interrupt requests
Rev. 6.00 Sep 12, 2006 page 486 of 526
REJ09B0326-0600