H8S2607 Datasheet, PDF (504/710 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 14 I²C Bus Interface
SCL
(master output)
7
8
9
SCL
(slave output)
SDA
(master output)
SDA
(slave output)
Bit 1 Bit 0
Data 1
[4]
A
RDRF
1
2
3
4
5
6
7
8
9
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Data 2
[4]
A
IRIC
ICDRS
Interrupt
request
generation
Data 1
Interrupt
request
generation
Data 2
ICDRR
Data 1
Data 2
User processing
[5] ICDR read [5] IRIC clearance
Figure 14.13 Example of Slave Receive Mode Operation Timing (2)
(MLS = ACKB = 0)
14.4.6 Slave Transmit Operation
In slave transmit operation, the slave device compares its own address with the slave address
transmitted by the master device in the first frame (address receive frame) following detection of
the start condition. If the addresses match and the 8th bit (R/W) is set to 1 (read), the TRS bit in
ICCR is automatically set to 1 and slave transmit mode is activated.
Figure 14.17 is a flowchart showing an example of slave transmit mode operation.
Rev. 1.00 Jan. 29, 2008 Page 464 of 666
REJ09B0427-0100