H8S2607 Datasheet, PDF (146/710 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 7 Bus Controller (BSC)
A block diagram of the bus controller is shown in figure 7.1.
External bus control signals
Area decoder
ABWCR
ASTCR
BCRH
BCRL
Bus
controller
Internal
address bus
Internal control
signals
Bus mode signal
Wait
controller
WCRH
WCRL
Bus arbiter
CPU bus request signal
DTC bus request signal
CPU bus acknowledge signal
DTC bus acknowledge signal
[Legend]
ABWCR: Bus width control register
ASTCR: Access state control register
BCRH: Bus control register H
BCRL: Bus control register L
WCRH: Wait control register H
WCRL: Wait control register L
Figure 7.1 Block Diagram of Bus Controller
Rev. 1.00 Jan. 29, 2008 Page 106 of 666
REJ09B0427-0100