RJE0615JSP Datasheet, PDF (5/8 Pages) Renesas Technology Corp – Silicon P Channel MOS FET Series Power Switching

RJE0615JSP
Shutdown Case Temperature vs.
Gate to Source Voltage
200
180
160
140
120
I_D = −1 A
dv / dt
V_GS ≥ 500 V/ ms
100
0
−2 −4 −6 −8 −10
Gate to Source Voltage V_GS (V)
Preliminary
Normalized Transient Thermal Impedance vs. Pulse Width
10
1 ^D=1
0.5
0.2
0.1 ^0.1
0.05
0.01
0.02
0.01
1shot
pulse
0.001
100 μ 1 m
θch − f(t) = γs (t) • θch − f
θch − f = 83.3°C/W, Ta = 25°C
When using the glass epoxy board
(FR4 40 × 40 × 1.6 mm)
PDM
D=
PW
T
PW
T
10 m 100 m 1
10
Pulse Width PW (S)
100 1000 10000
Vin
–10 V
Avalanche Test Circuit
V_DS
Monitor
Rg
50 Ω
L
I_AP
Monitor
D.U.T
V_DD
Avalanche Waveform
E_AR =
1
2
• L • I_AP2 •
V_DSS
V_DSS – V_DD
I_AP
I_D
V_(BR)DSS
V_DS
V_DD
0
R07DS0124EJ0200 Rev.2.00
Sep 01, 2010
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