English
Language : 

R1EX24512ASAS0A Datasheet, PDF (5/23 Pages) Renesas Technology Corp – Two-wire serial interface 512k EEPROM (64-kword × 8-bit)
R1EX24512ASAS0A
AC Characteristics (Ta = −40 to +85°C, VCC = 1.8 to 5.5 V)
Test Conditions
• Input pules levels:
 VIL = 0.2 × VCC
 VIH = 0.8 × VCC
• Input rise and fall time: ≤ 20 ns
• Input and output timing reference levels: 0.5 × VCC
• Output load: TTL Gate + 100 pF
Parameter
V = 1.8 V to 5.5 V
CC
Symbol Min Typ Max
V = 2.5 V to 5.5 V
CC
Min Typ Max
Unit
Clock frequency
fSCL
Clock pulse width low
t
LOW
Clock pulse width high t
HIGH
Noise suppression time tI
Access time
tAA
Bus free time for next
t
BUF
mode


1200 
600 


100 
1200 
400 


600 

400 
50


900 100 

500 
1000 kHz

ns

ns
50
ns
550 ns

ns
Start hold time
tHD.STA
600

Start setup time
tSU.STA
600

Data in hold time
t
0

HD.DAT
Data in setup time
t
100 
SU.DAT
Input rise time
tR


Input fall time
t


F
Stop setup time
t
600 
SU.STO
Data out hold time
tDH
50

Write protect hold time tHD.WP 1200 
Write protect setup time tSU.WP 0

Write cycle time
t


WC
Erase/Write Endurance 

106

250 

250 

0


100 
300 

300 


250 

50


600 

0

5




106

ns

ns

ns

ns
300 ns
100 ns

ns

ns

ns

Ns
5
ms

cycles
Notes: 1. This parameter is sampled and not 100% tested.
2. t is the time from a stop condition to the end of internally controlled write cycle.
WC
3. This parameter is sampled and not 100% tested.
106 Cycles (Ta = 25°C)
105 Cycles (Ta = 85°C)
Notes
1
1
1
2
3
REJ03C0325-0100 Rev.1.00 May. 16, 2008
Page 5 of 21