NP80N04EHE_15 Datasheet, PDF (5/12 Pages) Renesas Technology Corp – SWITCHING N-CHANNEL POWER MOS FET

NP80N04EHE, NP80N04KHE, NP80N04CHE, NP80N04DHE, NP80N04MHE, NP80N04NHE
ELECTRICAL CHARACTERISTICS (TA = 25°C)
Characteristics
Symbol
Test Conditions
Zero Gate Voltage Drain Current
IDSS
VDS = 40 V, VGS = 0 V
Gate to Source Leakage Current
Gate to Source Threshold Voltage
IGSS
VGS(th)
VGS = ±20 V, VDS = 0 V
VDS = VGS, ID = 250 μA
Forward Transfer Admittance
| yfs |
VDS = 10 V, ID = 40 A
Drain to Source On-state Resistance
RDS(on)
VGS = 10 V, ID = 40 A
Input Capacitance
Ciss
VDS = 25 V,
Output Capacitance
Coss
VGS = 0 V,
Reverse Transfer Capacitance
Crss
f = 1 MHz
Turn-on Delay Time
td(on)
VDD = 20 V, ID = 40 A,
Rise Time
tr
VGS = 10 V,
Turn-off Delay Time
td(off)
RG = 1 Ω
Fall Time
tf
Total Gate Charge
QG
VDD = 32 V,
Gate to Source Charge
QGS
VGS = 10 V,
Gate to Drain Charge
QGD
ID = 80 A
Body Diode Forward Voltage
VF(S-D)
IF = 80 A, VGS = 0 V
Reverse Recovery Time
Reverse Recovery Charge
trr
IF = 80 A, VGS = 0 V,
Qrr
di/dt = 100 A/μs
MIN. TYP. MAX. Unit
10
μA
±10 μA
2.0 3.0 4.0
V
15 31
S
6.2 8.0 mΩ
2200 3300 pF
490 730 pF
230 410 pF
24 52
ns
14 36
ns
44 88
ns
15 37
ns
40 60
nC
12
nC
16
nC
1.0
V
40
ns
50
nC
TEST CIRCUIT 1 AVALANCHE CAPABILITY
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
RG = 25 Ω
L
PG.
50 Ω
VDD
VGS = 20 → 0 V
IAS
ID
VDD
BVDSS
VDS
Starting Tch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
PG.
RG
VGS
0
τ
τ = 1 μs
Duty Cycle ≤ 1%
RL
VDD
VGS
VGS
Wave Form
10%
0
VDS
90%
VDS
VDS
0
Wave Form
td(on)
VGS
90%
90%
10% 10%
tr td(off)
tf
ton
toff
D.U.T.
IG = 2 mA
RL
PG.
50 Ω
VDD
Data Sheet D14239EJ7V0DS
3