HD74LV10A Datasheet, PDF (5/8 Pages) Hitachi Semiconductor – Triple 3-input Positive NAND Gates

HD74LV10A
Operating Characteristics
Item
Symbol
Power dissipation capacitance C_PD
V_CC (V)
3.3
5.0
Ta = 25°C
Min
Typ
—
9.5
—
11.0
Max
—
—
C_L = 50 pF
Unit Test Conditions
pF
f = 10 MHz
Noise Characteristics
Item
Quiet output, maximum
dynamic V_OL
Quiet output, minimum
dynamic V_OL
Quiet output, minimum
dynamic V_OH
High-level dynamic input
voltage
Low-level dynamic inout
voltage
Symbol
V_{OL (P)}
V_CC (V)
3.3
Ta = 25°C
Min
Typ
—
0.2
V_{OL (V)}
3.3
—
–0.1
V_{OH (V)}
3.3
—
3.2
V_{IH (D)}
3.3
2.31
—
V_{IL (D)}
3.3
—
—
Max
0.8
–0.8
—
—
0.99
C_L = 50 pF
Unit Test Conditions
V
V
Test Circuit
Measurement point
C_L^*
Note: C_L includes the probe and jig capacitance.
Rev.3.00, May 24, 2004, page 5 of 7