HD74AC165 Datasheet, PDF (5/7 Pages) Hitachi Semiconductor – Parallel-Load 8-bit Shift Register

HD74AC165
AC Operating Requirements
Ta = –40°C
Ta = +25°C
to +85°C
C_L = 50 pF
C_L = 50 pF
Item
Symbol V_CC (V)*¹
Typ
Guaranteed Minimum
Unit
Setup time, HIGH or LOW
t_su
3.3
3.5
5.0
6.0
ns
H to S_L
5.0
2.5
4.0
4.5
Hold time, HIGH or LOW
t_h
3.3
–1.0
0.5
0.5
ns
H to S_L
5.0
–0.5
0.5
0.5
Setup time, HIGH or LOW
t_su
3.3
1.0
3.5
4.0
ns
S_in to CP
5.0
0.5
3.0
3.5
Hold time, HIGH or LOW
t_h
3.3
1.5
2.0
2.0
ns
S_in to CP
5.0
1.0
2.0
2.0
Setup time, HIGH or LOW
t_su
3.3
3.0
5.0
6.0
ns
S_L to CP
5.0
2.0
4.0
4.5
Hold time, HIGH or LOW
t_h
3.3
–2.0
0.0
0.0
ns
S_L to CP
5.0
–1.0
0.0
0.0
Recovery time clock inhibit
t_rec
3.3
2.5
3.5
3.5
ns
to CP
5.0
2.0
3.0
3.0
Clock pulse width
t_w
3.3
3.0
5.5
7.0
ns
5.0
3.0
4.5
5.0
Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
Capacitance
Item
Input capacitance
Power dissipation capacitance
Symbol
C_IN
C_PD
Typ
4.5
50
Unit
pF
pF
V_CC = 5.5 V
V_CC = 5.0 V
Condition
Rev.2.00, Jul.16.2004, page 5 of 6