32172 Datasheet, PDF (5/875 Pages) Renesas Technology Corp – 32-bit RISC Single-chip Microcomputers

How to read internal I/O register tables
➀ Bit Numbers: Each register is connected with an internal bus of 16-bit
wide, so the bit numbers of the registers located at even
addresses are D0-D7, and those at odd addresses are
D8-D15.
➁ State of Register at Reset: Represents the initial state of each register
immediately after reset with hexadecimal numbers
(undefined bits after reset are indicated each in column ➂.)
➂ At read:
... read enabled
? ... read disabled (read value invalid)
0 ... Read always as 0
1 ... Read always as 1
{ At write:
: Write enabled
∆ : Write enable conditionally
(include some conditions at write)
- : Write disabled (Written value invalid)
<Example of representation>
Not implemented
in the shaded portion.
1
D0
1
2
3
Abit
Bbit
Cbit
Registers represented with thick rectangles
are accessible only with halfwords or words
(not accessible with bytes).
4
D
Bit name
0
Not assigned.
1
Abit
(...................)
2
Bbit
(...................)
3
Cbit
(...................)
Function
0: -----
1: -----
0: -----
1: -----
0: -----
1: -----
2
<at reset: H'04>
RW
0
3
4