2SK1832 Datasheet, PDF (5/7 Pages) Renesas Technology Corp – Silicon N Channel MOS FET

2SK1832
Reverse Drain Current vs.
Source to Drain Voltage
20
Pulse Test
16
12
8
4
5, 10 V
V_GS = 0, –10 V
0
0.4 0.8 1.2 1.6 2.0
Source to Drain Voltage V_SD (V)
Normalized Transient Thermal Impedance vs. Pulse Width
3
1 ^D=1
0.5
0.3 _0.2
0.1 ^0.1
0.05
0.03
0.01
0.02
0.01 _{1 Shot Pulse}
10 µ
100 µ
θch – c(t) = γs(t) • θch – c
θch – c = 2.50°C/W, Tc = 25°C
P_DM
PW
T
D
=
PW
T
1m
10 m
100 m
1
10
Pulse Width PW (S)
Switching Time Test Circuit
Vin Monitor
D.U.T
Vout Monitor
R_L
Vin = 10 V
50 Ω
V_DD ^.=. 30 V
Waveforms
90 %
Vin 10 %
Vout 10 %
10 %
td _(on)
90 %
90 %
tr
td _(off)
tf
Rev.2.00 Sep 07, 2005 page 5 of 6