2SK1773 Datasheet, PDF (5/7 Pages) Hitachi Semiconductor – Silicon N-Channel MOS FET

2SK1773
Reverse Drain Current vs.
Source to Drain Voltage
10
Pulse Test
8
6
4
V_GS = 10 V
2
0, – 5 V
0
0.4
0.8
1.2
1.6
2.0
Source to Drain Voltage V_SD (V)
Normalized Transient Thermal Impedance vs. Pulse Width
3
D=1
1.0
0.5
Tc = 25°C
0.3
0.1
0.03
0.2
0.1
0.05
0.02
0.01
1 ^{shot Pulse}
0.01
10 µ
100 µ
1m
10 m
θ ch – c(t) = ^γ s(t) ^. θ ch – c
θ ch – c = 1.25°C / W, Tc = 25°C
P DM
D
=
PW
T
PW
T
100 m
1
10
Pulse Width PW (S)
Switching Time Test Circuit
Vin Monitor
Vin
10 V
50 Ω
D.U.T
Vout Monitor
RL
VDD ^=.. 30 V
Waveforms
90 %
Vin 10 %
Vout
10 %
10 %
td _(on)
90 %
90 %
tr
td _(off)
tf
Rev.2.00 Sep 07, 2005 page 5 of 6