2SK1526 Datasheet, PDF (5/7 Pages) Hitachi Semiconductor – Silicon N-Channel MOS FET

2SK1526, 2SK1527
Reverse Drain Current vs.
Source to Drain Voltage
50
Pulse Test
40
30
20
10
10 V
V_GS = 0, –5 V
0
0
0.4 0.8 1.2 1.6 2.0
Source to Drain Voltage V_SD (V)
3
D=1
1
0.5
Normalized Transient Thermal Impedance vs. Pulse Width
T_C = 25°C
0.3 _0.2
0.1
0.1 _0.05
0.02
0.03
1
0.01
Shot
Pulse
0.01
10 µ
100 µ
θch–c (t) = γ_S (t) · θch–c
θch–c = 0.5°C/W, T_C = 25°C
P_DM
C/W
PW
T
D
=
PW
T
1m
10 m
100 m
1
10
Pulse Width PW (S)
Switching Time Test Circuit
Vin Monitor
Vin
10 V
50 Ω
D.U.T
Vout Monitor
R_L
V=.._{D3D0 V}
Waveforms
90%
Vin _10%
Vout ^10%
t_{d (on)}
90%
t_r
90%
t_{d (off)}
10%
t_f
Rev.2.00 Sep 07, 2005 page 5 of 6