2SK1301 Datasheet, PDF (5/7 Pages) Hitachi Semiconductor – Silicon N-Channel MOS FET

2SK1301
Reverse Drain Current vs.
Source to Drain Voltage
20
Pulse Test
16
12
8
10 V
4
5V
V_GS = 0, –5 V
0
0.4 0.8 1.2 1.6 2.0
Source to Drain Voltage V_SD (V)
Normalized Transient Thermal Impedance vs. Pulse Width
3
1.0
D=1
0.5
T_C = 25°C
0.3
0.2
0.1
0.1
0.05
0.02
0.03 _{0.101Shot Pulse}
0.01
10 µ
100 µ
θch–c (t) = γs (t) • θch–c
θch–c = 2.5°C/W, T_C = 25°C
P_DM
PW
T
D = ^PTW
1m
10 m
100 m
1
10
Pulse Width PW (S)
Switching Time Test Circuit
Vin Monitor
D.U.T
Vout Monitor
R_L
50 Ω
Vin = 10 V
V_DD ^.=. 30 V
Waveforms
90 %
Vin 10 %
Vout 10 %
td(on)
90 %
90 %
tr
td(off)
10 %
tf
Rev.2.00 Sep 07, 2005 page 5 of 6