R8C28_08 Datasheet, PDF (452/473 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MCU R8C FAMILY / R8C/2x SERIES

R8C/28 Group, R8C/29 Group
21. Usage Notes
Table 21.2 EW1 Mode Interrupts
Mode
Status
EW1 During auto-erasure
(erase-suspend
function enabled)
During auto-erasure
(erase-suspend
function disabled)
During auto-
programming
(program suspend
function enabled)
During auto-
programming
(program suspend
function disabled)
When Maskable Interrupt
Request is Acknowledged
Auto-erasure is suspended after
td (SR-SUS) and interrupt
handling is executed. Auto-
erasure can be restarted by
setting the FMR41 bit in the
FMR4 register to 0 (erase restart)
after interrupt handling
completes.
Auto-erasure has priority and the
interrupt request
acknowledgement is put on
standby. Interrupt handling is
executed after auto-erasure
completes.
Auto-programming is suspended
after td (SR-SUS) and interrupt
handling is executed.
Auto-programming can be
restarted by setting the FMR42 bit
in the FMR4 register to 0
(program restart) after interrupt
handling completes.
Auto-programming has priority
and the interrupt request
acknowledgement is put on
standby. Interrupt handling is
executed after auto-programming
completes.
When Watchdog Timer, Oscillation Stop
Detection, Voltage Monitor 1, or Voltage
Monitor 2 Interrupt Request is
Acknowledged
Once an interrupt request is
acknowledged, auto-programming or
auto-erasure is forcibly stopped
immediately and the flash memory is
reset. Interrupt handling starts after the
fixed period and the flash memory
restarts. Since the block during auto-
erasure or the address during auto-
programming is forcibly stopped, the
normal value may not be read. Execute
auto-erasure again and ensure it
completes normally.
Since the watchdog timer does not stop
during the command operation,
interrupt requests may be generated.
Reset the watchdog timer regularly
using the erase-suspend function.
NOTES:
1. Do not use the address match interrupt while a command is executing because the vector of the
address match interrupt is allocated in ROM.
2. Do not use a non-maskable interrupt while block 0 is being automatically erased because the fixed
vector is allocated in block 0.
Rev.2.10 Sep 26, 2008 Page 433 of 441
REJ09B0279-0210