H838099 Datasheet, PDF (443/736 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Tiny Series

Section 17 Serial Communications Interface 3 (SCI3, IrDA)
17.7.2 Reception
During reception, IR frames are converted to UART frames using the IrDA interface before
inputting to the SCI3_1.
Data of level 0 is output each time a high-level pulse is detected and data of level 1 is output when
no pulse is detected in a bit cycle. If a pulse has a high-level width of less than 1.41 µs, the
minimum width allowed, the pulse is not recognized.
17.7.3 High-Level Pulse Width Selection
Table 17.12 shows possible settings for bits IrCKS2 to IrCKS0 (minimum pulse width), and this
LSI's operating frequencies and bit rates, for making the pulse width shorter than 3/16 times the bit
rate in transmission.
Table 17.13 IrCKS2 to IrCKS0 Bit Settings
Operating
Frequency
φ (MHz)
2
2.097152
2.4576
3
3.6864
4.9152
5
6
6.144
7.3728
8
9.8304
10
Bit Rate (bps) (Upper Row) / Bit Interval × 3/16 (µs) (Lower Row)
2400
9600
19200
38400
78.13
19.53
9.77
4.88
010
010
010
010
010
010
010
010
010
010
010
010
011
011
011
011
011
011
011
011
011
011
011
011
011
011
011
011
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
Rev. 2.00 Jul. 04, 2007 Page 403 of 692
REJ09B0309-0200