H8S2609 Datasheet, PDF (441/624 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 13 Serial Communication Interface (SCI)
13.7.7 Serial Data Reception (Except for Block Transfer Mode)
Data reception in smart card interface mode uses the same operation procedure as for normal serial
communication interface mode. Figure 13.29 illustrates the retransfer operation when the SCI is in
receive mode.
1. If an error is found when the received parity bit is checked, the PER bit in SSR is
automatically set to 1. If the RIE bit in SCR is set at this time, an ERI interrupt request is
generated. The PER bit in SSR should be kept cleared to 0 until the next parity bit is sampled.
2. The RDRF bit in SSR is not set for a frame in which an error has occurred.
3. If no error is found when the received parity bit is checked, the PER bit in SSR is not set to 1,
the receive operation is judged to have been completed normally, and the RDRF flag in SSR is
automatically set to 1. If the RIE bit in SCR is enabled at this time, an RXI interrupt request is
generated.
Figure 13.30 shows a flowchart for reception. A sequence of receive operations can be performed
automatically by specifying the DTC to be activated using an RXI interrupt source. In a receive
operation, an RXI interrupt request is generated when the RDRF flag in SSR is set to 1. If the RXI
request is designated beforehand as a DTC activation source, the DTC will be activated by the
RXI request, and the receive data will be transferred. The RDRF flag is cleared to 0 automatically
when data is transferred by the DTC. If an error occurs in receive mode and the ORER or PER
flag is set to 1, a transfer error interrupt (ERI) request will be generated. Hence, so the error flag
must be cleared to 0. In the event of an error, the DTC is not activated and receive data is skipped.
Therefore, receive data is transferred for only the specified number of bytes in the event of an
error. Even when a parity error occurs in receive mode and the PER flag is set to 1, the data that
has been received is transferred to RDR and can be read from there.
Note: For details on receive operations in block transfer mode, see section 13.4, Operation in
Asynchronous Mode.
nth transfer frame
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp DE
Retransferred frame
Transfer
frame n+1
(DE)
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp Ds D0 D1 D2 D3 D4
RDRF
[2]
[4]
PER
[1]
[3]
Figure 13.29 Retransfer Operation in SCI Receive Mode
Rev. 1.00 Jan. 25, 2008 Page 407 of 586
REJ09B0428-0100