32180 Datasheet, PDF (435/839 Pages) Renesas Technology Corp – 32-Bit RISC Single-Chip Microcomputers M32R Family M32R/ECU Series

10
MULTIJUNCTION TIMERS
10.8 TOU (Output-Related 24-Bit Timer)
10.8.17 0% or 100% Duty-Cycle Wave Output during PWM Output and Single-shot PWM
Output Modes
During PWM output or single-shot PWM output mode, if the value ‘FFFF’ is written to the reload 0 or reload 1
register, F/F output will not be inverted, making it possible to produce a 0% or 100% duty-cycle PWM output.
Because determination is made to see if the reload value is ‘FFFF’ during PWM output or single-shot PWM
output mode, following precautions must be observed.
(1) Because the counter counts one even when detecting 0% or 100% duty-cycle, one of the two reload
registers must have set in it one less than the intended value in order for a constant-cycle waveform to be
produced.
Example: If the desired output cycle is 10 counts
Cycle ratio
Count ratio
ƒRegister set values
50% : 50%
5:5
0004 : 0004
80% : 20%
8:2
0007 : 0001
90% : 10%
9:1
0008 : 0000
100% : 0%
10 : 0
0009 : FFFF
Because the counter counts n + 1, the values actually set in the
respective registers must be one less than the intended value.
0008: FFFF
The counter counts one without invert-
ing F/F output after detecting ‘FFFF.’
For this reason, the value to be set in the
register must be ‘0008’, and not ‘0009’.
(2) Because setting the value ‘FFFF’ in the reload register produces a 0% or 100% duty-cycle, it is impossible
to count the exact ‘FFFF.’
(3) Setting the value ‘FFFF’ in both reload 0 and reload 1 registers is inhibited.
(4) Writing the value ‘FFFF’ to the counter while in operation is inhibited.
(5) Even for a 0% or 100% duty-cycle, interrupt requests and startup registers to other timers are generated.
(6) Because a 0% or 100% duty-cycle needs to be determined when reloading the counter, there is a one
count clock equivalent delay before F/F is inverted and an interrupt or DMA transfer request is generated.
However, startup requests to other timers are not delayed.
10-192
32180 Group User’s Manual (Rev.1.0)