RJK1054DPB Datasheet, PDF (4/7 Pages) Renesas Technology Corp – Silicon N Channel Power MOS FET Power Switching

RJK1054DPB
Static Drain to Source on State Resistance
vs. Temperature
50
Pulse Test
I_D = 10 A
40
30
V_GS = 10 V
20
10
0
–25 0 25 50 75 100 125 150
Case Temperature Tc ( °C)
Dynamic Input Characteristics
100
I_D = 20 A
20
V_GS
80
V_DD = 50 V
16
25 V
10 V
60 _VDS
12
40
8
20
V_DD = 50 V
4
25 V
10 V
0
0
0
10 20 30 40 50
Gate Charge Qg (nC)
Maximum Avalanche Energy vs.
Channel Temperature Derating
5
4
3
2
1
0
25 50 75 100 125 150
Channel Temperature Tch (°C)
10000
Preliminary
Typical Capacitance vs.
Drain to Source Voltage
Ciss
1000
100
Coss
V_GS = 0 V
f = 1 MHz
Crss
10
0
20 40 60 80 100
Drain to Source Voltage V_DS (V)
Reverse Drain Current vs.
Source to Drain Voltage
20
10 V
16
Pulse Test
12
8
4
V_GS = 0 V
0
0.4 0.8 1.2 1.6 2.0
Source to Drain Voltage V_SD (V)
R07DS0093EJ0200 Rev.2.00
Aug 17, 2010
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