RJK0354DSP_10 Datasheet, PDF (4/7 Pages) Renesas Technology Corp – Silicon N Channel Power MOS FET Power Switching

RJK0354DSP
Static Drain to Source on State Resistance
vs. Temperature
20
Pulse Test
16
I_D = 2 A, 5 A, 10 A
12
8 ^{VGS = 4.5 V}
4
10 V
2 A, 5 A, 10 A
0
–25 0 25 50 75 100 125 150
Case Temperature Tc (°C)
Dynamic Input Characteristics
50
I_D = 16 A
40
30
V_DS
V_DD = 25 V
10 V
20
V_GS
16
12
20
8
10
4
V_DD = 25 V
10 V
0
0
0
10 20 30 40
50
Gate Charge Qg (nc)
Maximum Avalanche Energy vs.
Channel Temperature Derating
50
I_AP = 15 A
40
V_DD = 15 V
duty < 0.1%
Rg ≥ 50 Ω
30
20
10
0
25 50 75 100 125 150
Channel Temperature Tch (°C)
Preliminary
10000
Typical Capacitance vs.
Drain to Source Voltage
3000
1000
300
100
Ciss
Coss
Crss
30 _{VGS = 0}
f = 1 MHz
10
0
10
20
30
Drain to Source Voltage V_DS (V)
Reverse Drain Current vs.
Source to Drain Voltage
20
10 V
16
5V
Pulse Test
12
8
4
V_GS = 0, –5 V
0
0.4 0.8 1.2 1.6 2.0
Source to Drain Voltage V_SD (V)
REJ03G1661-0200 Rev.2.00
Apr 05, 2010
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