R1EX24512BSAS0G Datasheet, PDF (4/18 Pages) Renesas Technology Corp – Two-wire serial interface 512k EEPROM

R1EX24512BSAS0G/R1EX24512BTAS0G
AC Characteristics
Test Conditions
 Input pules levels:
 V_IL = 0.2  V_CC
 V_IH = 0.8  V_CC
 Input rise and fall time:  20 ns
 Input and output timing reference levels: 0.5  V_CC
 Output load: TTL Gate + 100 pF
(Ta = 40 to +105C, V_CC = 1.8 to 5.5 V)
Parameter
Symbol
V_CC = 1.8 V to 5.5 V
Min
Typ
Max
V_CC = 2.5 V to 5.5 V
Min
Typ Max Unit
Notes
Clock frequency
f_SCL


400

 1000 kHz
Clock pulse width low
t_LOW
1200


600


ns
Clock pulse width high
t_HIGH
600


400


ns
Noise suppression time
t_I


50


50
ns
1
Access time
t_AA
100

900
100

550
ns
Bus free time for next mode t_BUF
1200


500


ns
Start hold time
t_HD.STA
600


250


ns
Start setup time
t_SU.STA
600


250


ns
Data in hold time
t_HD.DAT
0


0


ns
Data in setup time
t_SU.DAT
100


100


ns
Input rise time
t_R


300


300
ns
1
Input fall time
t_F


300


100
ns
1
Stop setup time
t_SU.STO
600


250


ns
Data out hold time
t_DH
50


50


ns
Write protect hold time
t_HD.WP
1200


600


ns
Write protect setup time
t_SU.WP
0


0


ns
Write cycle time
t_WC


5


5
ms
2
Notes: 1. Not 100 tested.
2. t_WC is the time from a stop condition to the end of internally controlled write cycle.
R10DS0111EJ0200 Rev.2.00
Feb. 18, 2013
Page 4 of 16