R1EX24008ASAS0I_15 Datasheet, PDF (4/17 Pages) Renesas Technology Corp – Two-wire serial interface 8k EEPROM (1024-word x 8-bit)

R1EX24008ASAS0I/R1EX24008ATAS0I
AC Characteristics
Test Conditions
• Input pules levels:
⎯ V_IL = 0.2 × V_CC
⎯ V_IH = 0.8 × V_CC
• Input rise and fall time: ≤ 20 ns
• Input and output timing reference levels: 0.5 × V_CC
• Output load: TTL Gate + 100 pF
(Ta = −40 to +85°C, V_CC = 1.8 to 5.5 V)
Parameter
Symbol Min
Typ
Max Unit
Clock frequency
f_SCL
⎯
⎯
400
kHz
Clock pulse width low
t_LOW
1200
⎯
⎯
ns
Clock pulse width high
t_HIGH
600
⎯
⎯
ns
Noise suppression time
t_I
⎯
⎯
50
ns 1
Access time
t_AA
100
⎯
900
ns
Bus free time for next mode
t_BUF
1200
⎯
⎯
ns
Start hold time
t_HD.STA
600
⎯
⎯
ns
Start setup time
t_SU.STA
600
⎯
⎯
ns
Data in hold time
t_HD.DAT
0
⎯
⎯
ns
Data in setup time
t_SU.DAT
100
⎯
⎯
ns
Input rise time
t_R
⎯
⎯
300
ns 1
Input fall time
t_F
⎯
⎯
300
ns 1
Stop setup time
t_SU.STO
600
⎯
⎯
ns
Data out hold time
t_DH
50
⎯
⎯
ns
Write protect hold time
t_HD.WP
1200
⎯
⎯
ns
Write protect setup time
t_SU.WP
0
⎯
⎯
ns
Write cycle time
t_WC
⎯
⎯
5
ms 2
Notes: 1. Not 100% tested.
2. t_WC is the time from a stop condition to the end of internally controlled write cycle.
Notes
R10DS0210EJ0100 Rev.1.00
Nov 08, 2013
Page 4 of 15