|
R1EV24002ASAS0I Datasheet, PDF (4/17 Pages) Renesas Technology Corp – Two-wire serial interface 2k EEPROM Power dissipation | |||
|
◁ |
R1EV24002ASAS0I
Preliminary
AC Characteristics
Test Conditions
ï· Input pules levels:
ï¾ VIL = 0.2 ï´ VCC
ï¾ VIH = 0.8 ï´ VCC
ï· Input rise and fall time: ï£ 20 ns
ï· Input and output timing reference levels: 0.5 ï´ VCC
ï· Output load: TTL Gate + 100 pF
(Ta = ï40 to +85ï°C, VCC = 2.5 to 5.5 V)
Parameter
Symbol
Min
Typ
Max
Unit
Notes
Clock frequency
Clock pulse width low
Clock pulse width high
Noise suppression time
Access time
Bus free time for next mode
Start hold time
Start setup time
Data in hold time
Data in setup time
Input rise time
Input fall time
Stop setup time
Data out hold time
Write protect hold time
Write protect setup time
Write cycle time
fSCL
ï¾
ï¾
400
kHz
tLOW
1200
ï¾
ï¾
ns
tHIGH
600
ï¾
ï¾
ns
tI
ï¾
ï¾
50
ns
1
tAA
100
ï¾
900
ns
tBUF
1200
ï¾
ï¾
ns
tHD.STA
600
ï¾
ï¾
ns
tSU.STA
600
ï¾
ï¾
ns
tHD.DAT
0
ï¾
ï¾
ns
tSU.DAT
100
ï¾
ï¾
ns
tR
ï¾
ï¾
300
ns
1
tF
ï¾
ï¾
300
ns
1
tSU.STO
600
ï¾
ï¾
ns
tDH
50
ï¾
ï¾
ns
tHD.WP
1200
ï¾
ï¾
ns
tSU.WP
0
ï¾
ï¾
ns
tWC
ï¾
ï¾
5
ms
2
Notes: 1. Not 100ï¥ tested.
2. tWC is the time from a stop condition to the end of internally controlled write cycle.
R10DS0122EJ0100 Rev.1.00
Aug. 23, 2012
Page 4 of 15
|
▷ |