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R1EV24002ASAS0I Datasheet, PDF (4/17 Pages) Renesas Technology Corp – Two-wire serial interface 2k EEPROM Power dissipation
R1EV24002ASAS0I
Preliminary
AC Characteristics
Test Conditions
 Input pules levels:
 VIL = 0.2  VCC
 VIH = 0.8  VCC
 Input rise and fall time:  20 ns
 Input and output timing reference levels: 0.5  VCC
 Output load: TTL Gate + 100 pF
(Ta = 40 to +85C, VCC = 2.5 to 5.5 V)
Parameter
Symbol
Min
Typ
Max
Unit
Notes
Clock frequency
Clock pulse width low
Clock pulse width high
Noise suppression time
Access time
Bus free time for next mode
Start hold time
Start setup time
Data in hold time
Data in setup time
Input rise time
Input fall time
Stop setup time
Data out hold time
Write protect hold time
Write protect setup time
Write cycle time
fSCL


400
kHz
tLOW
1200


ns
tHIGH
600


ns
tI


50
ns
1
tAA
100

900
ns
tBUF
1200


ns
tHD.STA
600


ns
tSU.STA
600


ns
tHD.DAT
0


ns
tSU.DAT
100


ns
tR


300
ns
1
tF


300
ns
1
tSU.STO
600


ns
tDH
50


ns
tHD.WP
1200


ns
tSU.WP
0


ns
tWC


5
ms
2
Notes: 1. Not 100 tested.
2. tWC is the time from a stop condition to the end of internally controlled write cycle.
R10DS0122EJ0100 Rev.1.00
Aug. 23, 2012
Page 4 of 15