NP70N10KUF_15 Datasheet, PDF (4/11 Pages) Renesas Technology Corp – SWITCHING N-CHANNEL POWER MOS FET

NP70N10KUF
ELECTRICAL CHARACTERISTICS (TA = 25°C)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
Drain to Source Breakdown Voltage
BVDSS ID = 250 μA, VGS = 0 V
Zero Gate Voltage Drain Current
IDSS
VDS = 100 V, VGS = 0 V
Gate Leakage Current
IGSS
VGS = ±20 V, VDS = 0 V
Gate to Source Threshold Voltage
Forward Transfer Admittance ^Note
Drain to Source On-state Resistance ^Note
VGS(th)
| yfs |
RDS(on)
VDS = VGS, ID = 250 μA
VDS = 10 V, ID = 20 A
VGS = 10 V, ID = 35 A
Input Capacitance
Ciss
VDS = 25 V
Output Capacitance
Coss
VGS = 0 V
Reverse Transfer Capacitance
Crss
f = 1 MHz
Turn-on Delay Time
td(on)
VDD = 50 V, ID = 35 A
Rise Time
tr
VGS = 10 V
Turn-off Delay Time
td(off)
RG = 0 Ω
Fall Time
tf
Total Gate Charge
QG
VDD = 80 V
Gate to Source Charge
QGS
VGS = 10 V
Gate to Drain Charge
Body Diode Forward Voltage ^Note
QGD
VF(S-D)
ID = 70 A
IF = 70 A, VGS = 0 V
Reverse Recovery Time
trr
IF = 70 A, VGS = 0 V
Reverse Recovery Charge
Note Pulsed
Qrr
di/dt = 100 A/μs
TEST CIRCUIT 1 AVALANCHE CAPABILITY
TEST CIRCUIT 2 SWITCHING TIME
MIN.
100
1.7
11
TYP.
2.5
22
17
2500
270
110
25
9
48
7
50
16
19
1.0
88
245
MAX.
10
±100
3.3
20
3750
410
200
53
23
96
18
75
1.5
UNIT
V
μA
nA
V
S
mΩ
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
ns
nC
D.U.T.
RG = 25 Ω
L
PG.
50 Ω
VDD
VGS = 20 → 0 V
BVDSS
IAS
ID
VDD
VDS
Starting Tch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
RG
PG.
VGS
0
τ
τ = 1 μs
Duty Cycle ≤ 1%
RL
VDD
VGS
VGS
Wave Form
10%
0
VDS
90%
VDS
VDS
0
Wave Form
td(on)
VGS ^90%
90%
10% 10%
tr td(off) tf
ton
toff
D.U.T.
IG = 2 mA
RL
PG.
50 Ω
VDD
2
Data Sheet D18040EJ2V0DS