HD74LV166A_10 Datasheet, PDF (4/10 Pages) Renesas Technology Corp – Parallel-Load 8-bit Shift Register

HD74LV166A
Preliminary
Logic Diagram
A SER B
C
D
E
F
G CLR H SH/LD CLK CLK INH
R CP S
CD
Q
Timing Diagram
CLK
CLK INH
CLR
SER
SH/LD
A
B
C
D
Parallel
Inputs
E
F
G
H
Output QH
Clear
Serial shift
R CP S
CD
Q
QH
H
L
H
L
H
L
H
H
HH L H L H L H L
Inhibit
Load
Serial shift
R04DS0002EJ0400 Rev.4.00
Aug 16, 2010
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